Co-Founder
Los Angeles, CA, UNITED STATES
Dr. Schober is an inventor and entrepreneur with expertise in the area of electrical engineering and analog integrated circuit design.
2015
2015
2015
2015
2014
2014 - 2015
2008 - 2013
2006 - 2010
2005 - 2006
2005
2004 - 2005
2002 - 2005
2002 - 2004
2002
2002
Doctor of Philosophy, Electrical Engineering
2015
Master of Science, Biomedical Engineering
2014
Master of Science, Engineering Management
2010
Master of Science, Electrical Engineering
2007
Bachelor of Science, Electrical Engineering
2006
WO2017019064
2017-02-02
view moreKR20180034555
2018-04-04
view moreWO2017105554
2017-06-22
view moreUS10283506
2019-05-07
view moreCN108140613
2018-06-08
view moreWO2017019973
2017-02-02
view moreUS20180226930
2018-08-09
view moreCN108141181
2018-06-08
view moreWO2017019978
2017-02-02
view moreUS20180219519
2018-08-02
view moreCN108141180
2018-06-08
view moreWO2017019981
2017-02-02
view moreUS20180224878
2018-08-09
view moreCN108140614
2018-06-08
view moreWO2018098389
2018-05-31
view moreWO2016118936
2016-07-28
view moreUS20170373697
2017-12-28
view moreCA2973368
2016-07-28
view moreSusan Schober, John Choma
2015
This paper presents a wide-operating range analog phase locked loop (PLL) constructed from all-digital integrated circuit (IC) process components. Specifically, this work introduces 2 cutting-edge, scalable analog circuit designs for a charge pump (CP) and a voltage controlled oscillator (VCO). The ultra-low power and highly accurate CP circuit uses 6 minimum-sized transistors, a small metal interconnect capacitor, and, unlike the state-of-the-art, no current mirrors. The ring VCO has a reconfigurable, expandable structure and is capacitively tunable allowing for an exceptionally large frequency operating range of 0.8 to 28.2GHz making it suitable for variety of wireless and wireline applications. The PLL has been fabricated in a TSMC 40nm all-digital CMOS process and physically tested with a 0.5-1.2V supply. The fabricated PLL has an area of 0.0048mm 2 , consumes a maximum of 1.25mW, and has a 0.82 ±0.0275ps RMS jitter over the entire operating range.
Susan Schober, John Choma
2015
view moreSusan Schober, John Choma
2015
This paper presents a high performance, ultra-low power scalable charge pump (CP) design for analog phase locked loops (PLLs). The compact CP circuit uses 4 minimum-sized transistor switches and a relatively small capacitor for transferring charge within the PLL to adjust the voltage controlled oscillator (VCO) frequency. Unlike the state of the art, the proposed CP design does not use current mirrors, has the ability to operate at very low voltages, and does not suffer from traditional mismatch errors due to its unique design. The fast switching action of the proposed CP allows for the use of a no-added delay D-flip flop (DFF) based phase-frequency detector (PFD) resulting in reduced PLL control loop delay and very low reference spurs in a PLL design. The proposed CP has been fabricated with a 1-10GHz PLL in TSMC all-digital 40nm CMOS process and physically tested with a variable 0.5-1.2V supply and a 50MHz-1GHz reference frequency. The charge pump has an active area of 0.0004mm 2 , consumes on average 250pW power, and has a 0.1-0.3° phase error, depending on the PLL frequency of operation.
Roya Sheybani, Susan M. Schober, Ellis Meng
2013
Drug delivery is essential for the treatment of chronic conditions. Implantable site-specific drug delivery devices offer direct delivery to the site of therapy, improving treatment outcomes while reducing side effects and overall associated healthcare costs. Microelectromechanical systems (MEMS) miniaturize infusion pumps such that they are implantable; wirelessly-powered to eliminate the use of bulky, limited lifetime batteries; and volume efficient. Wireless communication allows remote monitoring of device status and performance, and remotely initiated changes to the drug regimen for patient tailored therapy. Requirements for a MEMS drug delivery device with wireless powering and data communication are presented along with an example of such a device.
Susan Schober, John Choma
2015
This paper presents a novel tunable wide-operating range capacitively phase-coupled low noise, low power ring-based voltage controlled oscillator (VCO) for use in multi-GHz phase-locked loops (PLLs). The basic building blocks of the ring oscillator (RO) design are discussed along with a technique to expand the VCO to a variety of phases and frequencies without the use of physical inductors. Improved performance with minimal phase noise are achieved in this ring VCO design through distributed passive-element injection locking (IL) of the staged phases via a network of symmetrically placed metal interconnect capacitors. Using this method, a 0.8-to-28.2 GHz quadrature ring VCO was designed, fabricated, and physically tested with a PLL in an all-digital 40nm TSMC CMOS process. Most notably the proposed quadrature VCO occupies an area of 0.0024mm2, consumes a power of 0.88mW at a 1.0V supply voltage, and possesses a phase noise of -124.5dBc/Hz at the 10MHz offset for a carrier frequency of 28.0GHz.
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